CrystalChip All-Silicon Photonic Interconnect: Lifting GPU-to-GPU Bandwidth to 20 TB/s

CrystalChip All-Silicon Photonic Interconnect: Lifting GPU-to-GPU Bandwidth to 20 TB/s

The US National Semiconductor Research Center (NSRC), together with Intel and TSMC, jointly unveiled CrystalChip at ISSCC 2026 — the first commercial AI accelerator prototype to use all-silicon photonic interconnects. The chip is manufactured on TSMC's 3 nm process; the compute units remain conventional CMOS transistors, but on-chip and inter-chip communication is carried entirely by silicon photonic waveguides.

CrystalChip took four years to develop. The central challenge was raising silicon photonic device yields to a level compatible with CMOS. Silicon waveguides are extremely sensitive to defects — a single nanoscale particle can cause severe optical attenuation. The NSRC team developed a laser-anneal-based self-repair process that lifted wafer-scale yield from an early 14 percent to 87 percent.

On performance, an 8-card CrystalChip configuration achieves 20 TB/s of inter-card bandwidth, four times what NVIDIA H200 delivers with NVLink. In a head-to-head training run on a GPT-MoE-3T model, an 8-card CrystalChip cluster delivered 2.7 times the throughput of an 8-card H200 cluster while consuming only 38 percent of the energy per token.

The advantages of silicon photonic interconnects fall into three categories. First, bandwidth density: a single silicon waveguide can carry eight wavelength channels at 50 GHz, giving roughly 100 times the bandwidth density of copper cabling. Second, transmission distance: optical signals attenuate at just 0.3 dB per centimeter in silicon waveguides, so inter-chip communication can extend across tens of centimeters. Third, energy: the switching energy of an optical signal is nearly independent of transmission distance, which eliminates the fundamental energy bottleneck of copper cabling.

CrystalChip uses TSMC's latest CoWoS-L silicon interposer packaging. The interposer carries both the compute die and the silicon photonic engine, connected through silicon through-vias. This packaging approach moves optical signaling from chip-edge I/O pins to the wafer backside, further improving signal integrity.

CrystalChip is still some distance from high-volume manufacturing. The current prototype was fabricated only on a small-batch trial line, with per-chip cost above $4,800. Intel researcher Yuki Tanaka acknowledged that bringing costs down to a commercially viable level will require at least another 18 months of process optimization. Intel plans to ship engineering samples in the second half of 2026 and start small-batch production in 2027.

NVIDIA has stayed silent. Analyst firm Forward Insights believes NVIDIA will likely integrate similar silicon photonic interconnect technology in its Rubin Ultra, slated for 2027. NVIDIA in fact acquired a key patent portfolio from silicon photonic startup Lightmatter in 2024, a move widely seen as a significant technology reserve.

Beyond AI accelerators, CrystalChip's technology is applicable to data-center switches and high-performance computing. Oak Ridge National Laboratory has said it will trial CrystalChip's silicon photonic modules in the storage subsystem of its next-generation Frontier-2 supercomputer.